Semiconductor package featuring flip-chip die sandwiched between metal layers

ABSTRACT

Embodiments in accordance with the present invention relate to flip-chip packages for semiconductor devices, which feature a die sandwiched between metal layers. One metal layer comprises portions of the lead frame configured to be in electrical and thermal communication with various pads on a first surface of the die (e.g. IC pads or MOSFET gate or source pads) through a solder ball contact. The other metal layer is configured to be in at least thermal communication with the opposite side of the die. Embodiments of packages in accordance with the present invention exhibit superior heat dissipation qualities, while avoiding the expense of wire bonding. Embodiments of the present invention are particularly suited for packaging of power devices.

CROSS-REFERENCE TO RELATED APPLICATION

This patent application is a divisional of U.S. patent application Ser.No. 12/186,342, filed Aug. 5, 2008, which claims priority to the U.S.Provisional Patent Application No. 61/053,561, filed May 15, 2008, bothof which are incorporated by reference in their entirety herein for allpurposes.

BACKGROUND OF THE INVENTION

FIG. 1 shows a simplified plan view of a conventional package housing apower MOSFET die. FIG. 1A shows a simplified cross-sectional view of thepackage of FIG. 1, taken along line 1A-1A′.

Specifically, the conventional power MOSFET package 100 comprises powerMOSFET die 102 having a top surface and featuring gate pad 104 andsource pad 106. Gate pad 104 is configured to be in electricalcommunication with first lead 110 through bond wire 112, and source pad106 is configured to be in electrical communication with second lead 114through bond wire 116.

The bottom surface of die 102 features the drain pad 108. The drain padis in electrical communication with an underlying die pad 118 through anelectrically conducting adhesive material 120. This adhesive material120 is also thermally conductive, allowing heat generated by the MOSFETdie during operation, to be transported out of the package through theheat sink 122 formed by the lower surface of the die pad. Thermal energymay also be conducted out of the package through the leads that areintegral with the die pad.

While the package of FIGS. 1-1A is functional, it may offer certaindrawbacks. One drawback is the requirement to perform wire bondingbetween the pads or the surface of the die, and the leads. Specifically,this wire bonding step is costly, as the bond wire material is typicallymade from gold, a highly expensive commodity.

The wire bonding step is also difficult to perform, as it requires thebond wires to be bent (strained) and then attached with some force andwith high precision to the die and to a small target area at the ends ofthe leads. Fracture of the wire under the strain, or failure toaccurately align the wire end, can enhance defects and reducethroughput. The force of attachment of the wire to the die in this stepcan also harm the die.

Moreover, the source and gate bond wire connections limit the ability ofthe package to dissipate thermal energy. In particular, the small volumeof the bond wires offers only a small volume of thermally conductingmaterial to transport heat out of the package.

Finally, the relatively small cross-sections offered by the bond wiresmay interfere with establishing a low resistance contact between the dieand the leads. Conventional efforts to establish lower resistancecontacts often amount to the use of more bond wires, exacerbating thecost issues described above. Moreover, use of multiple stitches of abond wire to establish a low resistance contact the die surface,requires multiple attaching steps that again pose the danger of possiblydamaging the die.

Other disadvantages may be offered by the use of long and/or multiplebond wires as electrical connection to the die. For example bond wiresmay offer larger inductance that can impair the switching behavior ofMOSFETs. Also, bond wires can add uncontrolled external inductance orimpedance to a Power IC, which would require compensation in theinternal integrated circuitry.

Accordingly, there is a need in the art for improved package designsexhibiting favorable heat conduction and low cost fabrication.

BRIEF SUMMARY OF THE INVENTION

Embodiments in accordance with the present invention relate to packagesfor semiconductor devices, which feature a flip-chip die sandwichedbetween metal layers. One metal layer comprises portions of the leadframe configured to be in electrical and thermal communication withvarious pads on a first surface of the die (e.g. IC pads or MOSFET gateor source pads) through solder contacts. The other metal layer isconfigured to be in at least thermal communication with the oppositeside of the die. Embodiments of packages in accordance with the presentinvention exhibit superior heat dissipation qualities, while avoidingthe expense of wire bonding.

These and other embodiments of the present invention, as well as itsfeatures and some potential advantages are described in more detail inconjunction with the text below and attached figures.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows a simplified plan view of a conventional power MOSFETpackage.

FIG. 1A shows a simplified cross-sectional view of the conventionalpackage of FIG. 1, taken along line 1A-1A′.

FIG. 2 shows a simplified plan view of a package in accordance with anembodiment of the present invention.

FIG. 2A shows a simplified cross-sectional view taken along line 2A-2A′,of the package embodiment of FIG. 2.

FIG. 2B shows a simplified cross-sectional view of an alternativeembodiment of a package in accordance with the present invention.

FIG. 2C shows a simplified cross-sectional view of another alternativeembodiment of a package in accordance with the present invention.

FIG. 2D shows a simplified cross-sectional view of yet anotheralternative embodiment of a package in accordance with the presentinvention.

FIG. 2DA shows a simplified cross-sectional view of still anotheralternative embodiment of a package in accordance with the presentinvention.

FIGS. 2E-EA show plan and cross-sectional views, respectively, of anembodiment of a lead frame in accordance with an embodiment of thepresent invention.

FIGS. 2FA-FB show plan and cross-sectional views, respectively, of analternative embodiment of a lead frame in accordance with an embodimentof the present invention.

FIGS. 2GA-GB show plan and cross-sectional views, respectively, of analternative embodiment of a lead frame in accordance with an embodimentof the present invention.

FIG. 2H shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIGS. 2IA-IB show plan and cross-sectional views, respectively, of analternative embodiment of a lead frame in accordance with an embodimentof the present invention.

FIG. 2J shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIG. 2K shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIGS. 2LA-LB show plan and cross-sectional views, respectively, of analternative embodiment of a lead frame in accordance with an embodimentof the present invention.

FIG. 2M shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIG. 2N shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIG. 2O shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention.

FIG. 3A shows a simplified plan view of the upper metal layer of analternative embodiment of a lead frame in accordance with the presentinvention, that is configured to support multiple die.

FIG. 3B shows a simplified plan view of the lower metal layer of analternative embodiment of a lead frame in accordance with the presentinvention, that is configured to support multiple die.

FIG. 3C shows a simplified cross-sectional view of an embodiment of apackage in accordance with the present invention that is configured tohouse multiple die.

FIG. 4 shows a simplified plan view of an arrangement of multiple die ina lead frame according to an embodiment of the present invention.

FIG. 5 shows a simplified cross-sectional view of an embodiment of apackage in accordance with the present invention featuring multiple diein a stacked configuration.

FIG. 6 shows a simplified cross-sectional view of an alternativeembodiment of a package in accordance with the present invention.

FIG. 7 shows a simplified cross-sectional view of an alternativeembodiment of a package in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 2 is a simplified plan view of an embodiment of a package inaccordance with the present invention. FIG. 2A is a simplifiedcross-sectional view of the package of FIG. 2, taken along thecross-sectional line 2A-2A′.

Package 200 comprises MOSFET die 202 having a top surface featuring gatepad 204 and source pad 206. The bottom surface of MOSFET die 202features a drain contact 208.

Drain contact 208 is in electrical communication with an underlyingfirst metal layer 224, through electrically and thermally conductingadhesive material 220. One example of such an electrically and thermallyconducting material is solder. In certain embodiments, the first metallayer can be provided pre-bumped with solder balls or pre-formed with asolderable contact surface.

Integral projections of the first metal layer 224 extend outside of theplastic package body to provide leads for electrical contact with theMOSFET drain. The underside portion of the first metal layer that isexposed by the package body, may serve as a heat sink.

Package 200 includes a second metal layer 226 overlying the die. A firstportion of 228 of the second metal layer is in electrical communicationwith gate pad 204 through a solder connection 230. A second portion 232of the second metal layer is in electrical communication with source pad206 through multiple solder connections 234. Portions 228 and 232 of theupper metal layer 226 are in turn routed to extend out of the plasticpackage body to serve as leads for connection to the gate and source.This routing may involve changing the vertical height of the metalportions 228 and 232 to match the height of the first metal layer. Inparticular embodiments, the shape of the second metal layer can beformed by bending. In other embodiments, the second metal layer can beprovided in a pre-formed shape.

The package design of FIGS. 2-2A may offer a number of advantages overconventional package designs. One advantage is the avoidance of wirebonding during fabrication. Instead, contact between the die and thesecond metal layer is provided by solder contacts that do not requirebending and precise alignment of a metal bond wire. The use of suchsolder contacts instead of wire bonding reduces the incidence of defectsand reduces the overall cost of fabricating the package.

Embodiments of the present invention may also offer advantageouselectrical performance. For example, the reduced inductance of metallayers relative to bond wires offers reduced inductance, and may allowfaster switching speeds. The use of metal layers in place of narrow bondwires may also advantageously offer a reduced resistance contact to thedie housed by the package.

Another possible advantage offered by the embodiment of the packageshown in FIGS. 2-2A, is an enhanced ability to dissipate heat.Specifically, the lower metal layer is in thermal communication with thedrain contact of the die, and hence is able to conduct heat out of thepackage through the leads. And, in certain embodiments, a portion of thelower metal layer is exposed on the outside of the package, therebyserving as a heat sink to the surrounding environment.

Moreover, the upper metal layer is also in substantial thermal contactwith large areas of the die through the solder connections, and inparticular the source pad present on the upper surface of the die. Thislarge area of contact further enhances the flow of heat from the die outof the package to the surrounding environment through the leads. And, incertain embodiments, a portion of the upper metal layer is exposed onthe outside of the package, thereby serving as a heat sink to thesurrounding environment.

While the specific embodiment of FIGS. 2-2A shows the use of solderballs to establish an electrical connection with only one side of thedie, this is not required by the present invention. In accordance withalternative embodiments, solder balls could be employed to establishelectrical communication with contacts on both sides of the die.

And while the specific embodiment of FIGS. 2-2A shows the lower metallayer as being in contact with the drain and the upper metal layer asbeing in contact with the gate/source through solder connections, thisis not required by the present invention. Alternative embodiments of thepresent invention could feature the lower metal layer in contact withthe source and gate of the die, with the upper metal layer in contactwith the drain. Such an embodiment is illustrated in the simplifiedcross-sectional view of FIG. 2B. Again, both metal layers would offerthe desirable properties of high thermal conductivity and reliable, lowcost fabrication.

Moreover, FIG. 2C shows a simplified cross-sectional view of anotherembodiment of a package in accordance with the present invention. Inthis particular embodiment, the lower metal layer is bent upward tocontact a portion of the upper metal layer, which itself bends downwardto extend out of the body of the package. The embodiment of FIG. 2Coffers the benefit of ensuring that the upwardly projecting portion ofthe first metal layer remains securely embedded in the plastic body ofthe package. In addition, the design of FIG. 2C presents a square orrectangular profile of the heat sink, such that the integral portions ofthe lower metal layer exposed on the bottom of the package do not extendall the way to the sides of the package.

Following encapsulation of the die within the plastic package body, thepackage of FIG. 2C can be singulated from the surrounding material bypunching through the exposed lead, such that a portion of the leadextends out of the package body and is available for testing. Inaccordance with alternative embodiments, the package may be singulatedfrom the surrounding material through a sawing process, leaving theexposed leads flush with the surface of the package.

FIG. 2D shows a simplified cross-sectional view of yet anotherembodiment of a package in accordance with the present invention. Inthis particular embodiment, the first and second metal layers areconfigured to project from a half-way point in the thickness of thepackage. Such a configuration imparts substantial flexibility of use tothe package, as it allows the projecting leads to be bent in eitherdirection (up or down), and in a variety of shapes (J-shaped, gull-wingshaped, reverse gull-wing shaped) depending upon the requirements of theenvironment in which the package is ultimately to be located.

FIG. 2DA shows a simplified cross-sectional view of yet anotherembodiment of a package in accordance with the present invention. Thisembodiment shows a reverse-gull wing shaped lead projecting upwardtoward the heat sink disposed on the top of the package.

FIGS. 2E-2EA show simplified plan and cross-sectional views,respectively, of another embodiment of a package in accordance with thepresent invention. The package of FIGS. 2E-2EA includes projecting leadslocated on only one side of the package. A first projecting lead isformed from a portion of the lower metal layer that is positioned atmid-thickness of the package and in contact with a source pad on the diethrough solder contacts. A second projecting lead is also formed from aportion of the lower metal layer that is in contact with a gate pad onthe die through a solder contact. A third projecting lead is formed froma portion of the upper metal layer which is in contact with the drainpad of the die, and which is bent downward before ultimately exiting thepackage body at the mid-thickness height. As shown in FIG. 2E, the uppermetal layer may include an aperture that allows penetration of theplastic encapsulant of the package body, thereby assisting withmechanical interlocking of the upper metal layer within the package.

The embodiments described so far relate to packages housing MOSFETdevices having three (gate, source, drain) terminals. However, thepresent invention is not limited to housing a die of this type.Alternative embodiments of packages in accordance with the presentinvention can be configured to house die having fewer or more terminals.

For example, FIGS. 2FA-B show plan and cross-sectional views along line2F-2F′, of a lead frame for a planar two-terminal device (such as adiode) in accordance with an embodiment of the present invention. Thelead frame includes a lower metal layer in thermal communication onlywith a back of the die. The two portions of the upper metal layer are inelectrical communication with respective contacts on the upper side ofthe die.

Similarly, FIGS. 2GA-B show plan and cross-sectional views along line2G-2G′, of a lead frame for a vertical two-terminal device (such as adiode) in accordance with an embodiment of the present invention. Thelead frame includes a lower metal layer in electrical communication witha contact on the back side of the die, and an upper metal layer inelectrical communication with a contact on the front side of the die.

FIG. 2H shows a plan view of a lead frame for a package for a dualdevice, but having three terminals, two of which are connected to thesame portion of the device. In particular, the lower metal layer is inelectrical communication with a back side contact, and the upper metallayer defines two portions, each in electrical communication with thefront-side contact. The particular package shown in FIG. 2H is aTO-220/247/251 type package, featuring a tag hole configured to receivea screw in order to secure the package to a supporting structure. Otherembodiments include TO263/252 type package with external leads to theplastic body bent or pre-formed to meet the same plane of the Drainheatsink.

While the embodiments of packages and lead frames just described aredesigned for a single die, this is not required by the presentinvention. Alternative embodiments in accordance with the presentinvention could be configured to house multiple die.

For example, FIGS. 2IA-B show simplified plan and cross-sectional viewsalong line 2I-I′, of an embodiment of a lead frame in accordance withthe present invention, which is configured to house two dual die. Inthis particular embodiment, the two die share the same terminal for acommon backside contact, and have separate terminals and contacts ontheir front sides.

FIG. 2J shows a simplified plan view of an embodiment of a lead frame inaccordance with the present invention, which is configured to house twoMOSFET die. In this particular embodiment, the two MOSFET die share thesame terminal for a common backside contact (drain), and have separateterminals and contacts for the source and gate contacts on the frontside of the die.

While the embodiment of FIG. 2J shows a configuration having a singleterminal for each of the source, drain, and gate contacts, this is notrequired by the present invention. FIG. 2K shows a simplified plan viewof a lead frame for a MOSFET die having multiple terminals for thesource (S) and drain (D).

Similarly, FIGS. 2LA-B show simplified plan and cross-sectional viewsfor a lead frame having multiple source terminals for each of two MOSFETdie having drains isolated from each other. The portions of the leadframe in contact with these drains are secured together by a tie-barstructure that is severed (for example by punching) after the moldingstep. FIG. 2M shows a simplified plan view of a lead frame supportingtwo die having a common drain contact with two terminals (D1, D2),multiple source terminals for each die.

Similarly, FIG. 2N shows a plan view of another embodiment of a leadframe that features multiple source terminals, and multiple drainterminals with respective clip connections, and which further includestie-bar connections that are severed from the surrounding metal matrixduring singulation and after molding. FIG. 2O shows a simplified planview of another embodiment of a lead frame housing multiple MOSFET diewith pairs of ganged drain terminals to each, and also includestie-bars.

While the embodiments described so far relate to lead frames andpackages configured to house the same type of die, this is also notrequired by the present invention. Alternative embodiments could beconfigured to house different die types, for example MOSFETs andintegrated circuits (ICs).

For example, FIGS. 3A-B present plan views of a lead frame 300 inaccordance with an alternative embodiment of the present invention. FIG.3A shows a plan view of the upper metal layer 302 and the three packageddie 304, 306, and 308, while FIG. 3B shows a plan view of the lowermetal layer 310 and the packaged die 304, 306, and 308. FIG. 3C shows asimplified cross-sectional view.

The upper metal layer 302 of the lead frame defines the leads in contactwith various pads on the upper surface of the housed die. For example,die 304 represents an IC die having many contacts on its upper surface.Accordingly, the upper metal layer 302 of the lead frame comprises aplurality of leads (nos. 5-17) extending over these pads, withintervening solder contacts 312 providing the necessary electrical andthermal communication with the die.

Moreover, the leads of the upper metal layer 302 of the lead frame arenot limited to contacting an IC die of a particular size. Thus, as shownin FIG. 3A, these leads include two sets of solder contacts toaccommodate IC die occupying larger footprints.

By contrast, die 306 and 308 are MOSFETs having only a gate pad and alarger source pad on each of their top surfaces. Accordingly, the uppermetal layer includes only two separate portions for each MOSFET die,which extend over the respective gate/source pads and is in thermal andelectrical communication with each through an intervening soldercontact(s) 312. Specifically, upper metal portion 330 is in contact withthe gate pad of MOSFET die 306 (lead no. 4), and larger upper metalportion 332 is in contact with the source pad of die 306 (lead nos.33-36).

Although not required, in this particular embodiment the larger uppermetal portion 332 comprises a grid-like structure defining a pattern ofapertures 333. These apertures reduce the thermal strain in the largermetal portion that results from shrinking and expansion in response tothe changing thermal environment inside the package.

While the apertures of the embodiment of FIG. 3A are square-shaped, thisis not required by the present invention. Alternative embodiments couldfeature metal layers defining apertures of other shapes, including butnot limited to circular or polygonal, depending upon the particularapplication.

Similarly, larger portion 340 of the upper metal layer allows thermaland electrical contact with the source pad MOSFET die 308 (lead nos.21-27). In the particular embodiment of FIGS. 3A-B, the same (wider)portion of the upper metal layer (corresponding to lead no. 17) providesa common contact with both the IC and the gate pad of MOSFET die 308.

The upper metal layer 302 features solitary leads (nos. 18-20 and 32)and ganged leads (nos. 1-3 and 28-31). As described particularly below,leads 1-3, 28-31, and 32 and are in electrical communication with thedrain pads on the underside of the MOSFET die, through the lower metallayer.

As indicated in the cross-sectional view of FIG. 3C, prior to emergingfrom the package body, the extending leads from the upper metal layer ofthe lead frame 300 are bent downward, so that they ultimately projectfrom the bottom of the thickness of the package. However, this is notrequired by the present invention. In other embodiments the upper metallayer could emerge at an upper portion of the side of the package, forbending in either direction as described above in connection with FIG.2D.

The configuration of the lower metal layer 348 shown in FIG. 3B, issimpler than of the upper metal layer. In certain embodiments, portion350 of the lower metal layer underlying IC die 304, is not in electricalcommunication with the IC die at all. Accordingly, portion 350 is not incontact with any lead, but is exposed on the bottom of the package toprovide a heat sink. In certain embodiments that require the IC to begrounded and connected to a pin, the electrical connect is provided byconnecting, in this example, 350 to pin 5 in FIG. 3A.

In particular embodiments requiring connection between two or more die,the connect is provided by having two (or multiple) ball contactlocations on an appropriately patterned and continuous pin. Pin 17 inFIG. 3A is such an example, which connects the IC and the Gate of theMOSFET.

Portion 352 of the lower metal layer is in electrical and thermalcommunication with the drain pad on the underside of MOSFET die 306.Regions 352 a jog upward to meet the ganged pins 1-3 and solitary pin 32of the upper metal layer, thereby providing contact with the drain ofMOSFET die 306. These upward jogs in the lower metal layer also serve toprovide mechanical interlocking of that layer in the encapsulant of theplastic package body. The underside of lower metal portion 352 is alsoexposed by the underside of the package to provide a heat sink.

Portion 354 of the lower metal layer is in electrical and thermalcommunication with the drain pad on the underside of MOSFET die 308.Portions 354 a jog upward to meet the ganged pins 28-31 and pin 18 ofthe upper metal layer, thereby providing contact with the drain ofMOSFET die 308. These upward jogs in the lower metal layer also serve toprovide mechanical interlocking of that layer in the encapsulant of theplastic package body. The underside of lower metal portion 354 is alsoexposed by the underside of the package to provide a heat sink.

In the particular embodiment of the package of FIGS. 3A-B, pin no. 18serves to provide mounting and electrical connection to the heat sink ofthe drain of the MOSFET 308. Pin nos. 19 and 20 are no connect pins inthis embodiment, but can serve as spare locations for thermal andelectrical connections in other embodiments.

The embodiment of the lead frame just described, offers certainadvantages. One advantage is ready adaptability to house differentconfigurations of die and die sizes. For example, while the MOSFET dieare shown occupying the majority of the area available on the grid-likelower metal portions, this is not required. The embodiment of a leadframe shown in FIGS. 3A-B can be configured to house MOSFET dieoccupying a smaller footprint or a different footprint that fits withinthe upper metal portion. In certain such embodiments, the location of aparticular contact (such as the gate) may be fixed, with the location ofother contacts (such as to the source) able to vary in space dependingupon the size and shape of the die.

Portions of the metal layers of a lead frame projecting as pin(s) fromthe body of the package in accordance with embodiments of the presentinvention, can function internal to the package to perform a signalrouting function between two or more separate die mounted on the samehorizontal plane according to application needs. For example, FIG. 4shows a simplified schematic view of an embodiment, wherein IC die 401and MOSFET die 402 are connected through a continuous pin with solderball connections. Furthermore, FIG. 4 shows according to certainembodiments, this continuous pin connection can be extended as portion400 and then to portion 404, which provides continuous signal routingbetween contacts on the IC die 402 and MOSFET die 406. In certainembodiments, the portion 404 extends as projected pin portion 408.

While the embodiments shown so far depict a package and lead frameconfigured to house multiple die located with signal routing in the samehorizontal plane, this is not required by the present invention.Alternative embodiments of packages and lead frames in accordance withthe present invention may feature multiple die oriented in a verticalstack or other orientations.

For example, FIG. 5 shows a simplified cross-sectional view of anembodiment of a package configured to house two flip-chip die. The firstflip-chip die 500 is supported on the underside of an upper metal layer502 of the lead frame. The second flip-chip die 504 is supported on alower metal layer 506 of the lead frame. Contacts on the surfaces of die500 and 504 are in electrical communication with each other throughsolder balls 508. Other contacts on the surface of the first die 500 arein electrical contact with a middle metal layer 510.

Apart from the stacked die configuration, a couple of aspects of theembodiment of FIG. 5 are worthy of note. First, the package of FIG. 5has exposed heat sinks on both of its sides. One such heat sink could bein thermal communication with the underlying PC board, with the otherheat sink in thermal communication with the surrounding environment. Itis to be understood that such use of multiple heat sinks is alsopossible for one or more of the embodiments previously described.

Second, embodiments in accordance with the present invention are notlimited to the use of two or any number of multiple metal layers, or toincorporating only two die. Rather, embodiments of the present inventioncan utilize multiple metal layers sandwiching any number of desired die.

As described above in connection with FIGS. 3A-C, lead frames accordingto embodiments of the present invention offer flexibility to packagedesigners, by allowing die of multiple sizes to be supported on thevarious metal layers. Further flexibility in package design may beachieved by combining multiple modules in a sandwiched configurationaccording to embodiments of the present invention.

For example, FIG. 6 shows package 600 of FIG. 6 including a firstflip-chip die 602 sandwiched between first and second metal layers 604,606 as shown. Fabrication of a multi-chip module (MCM) is completed byincorporating a module 609 comprising a second flip-chip die 610 that isitself sandwiched between metal layers 612 and 614. Allowing the packageto be assembled from a plurality of sandwiched die components, in amanner analogous to the interlocking pieces of a puzzle, impartssubstantial additional flexibility in the design of a package forparticular needs.

FIG. 7 shows a simplified cross-sectional view of still anotherembodiment of a package in accordance with the present invention, thatis formed from a plurality of smaller elements. In particular, thepackage comprises die having interconnects and signal routing in thesame plane through a solder ball contact with one of the metal layers ofthe sandwich (e.g. through the shaded solder balls and the lower metallayer between FC DIE 3 and FC DIE 4). The package also includes diehaving vertical interconnections and signal routing with each otherthrough solder ball contacts (e.g. through the shaded solder balls andbetween FC DIE 1 and FC DIE 2). In this package, the lower metal layerof the sandwich could remain in the lower plane to establish contactwith the lower metal layer supporting one of the vertically connecteddie, or could be bent upward to establish contact with the upper metallayer in contact with the upper of the vertically connected die. Thepackage of FIG. 7 includes heat sinks on both sides, with the top sidehaving multiple heat sinks.

Embodiments in accordance with the present invention are not limited tohousing particular types of die. However, certain types of die such aspower devices are particularly suited for packaging according thepresent invention. For purposes of the instant application, the term“power device” is understood to refer to semiconductor devices used asswitches or rectifiers in power electronic circuits. These include butare not limited to discrete devices such as diodes, power MOSFETs,insulated gate bipolar transistors (IGBTs), and Power IntegratedCircuits used in the analog or digital control of the discrete devices.

In combination, the power devices are commonly employed to provide powermanagement functions such as power supply, battery charging controlsystems. Power discrete devices having a planar or vertical structure,can handle power from a few milliwatts to tens of kilowatts. For thepackages described above, a typical power device may operate at betweenabout 500 W and 5 mW. In the off state, reverse breakdown can occur atvoltages from about a few volts up to about 2000 volts. The operatingcurrent for power devices can range from a few milli-Amperes, to severalhundred Amperes.

While the above is a full description of the specific embodiments,various modifications, alternative constructions and equivalents may beused. Therefore, the above description and illustrations should not betaken as limiting the scope of the present invention which is defined bythe appended claims.

What is claimed is:
 1. A package for a semiconductor device, the packagecomprising: a first metal layer configured to be in thermal andelectrical communication with a power device die; and a second metallayer disposed on an opposite side of the power device die from thefirst metal layer, the second metal layer configured to be in electricaland thermal communication with a pad on a surface of the power devicedie through physical contact with a solder ball contact, the first metallayer comprising integral leads projecting from a plastic package bodyencapsulating the power device die, the solder ball contact, and atleast a part of the first and second metal layers; wherein the firstmetal layer is configured to be in electrical communication with thepower device die through a second solder ball contact.
 2. A package fora semiconductor device, the package comprising: a first metal layerconfigured to be in thermal and electrical communication with a MOSFETdie; a second metal layer disposed on an opposite side of the MOSFET diefrom the first metal layer, the second metal layer comprising: a firstportion configured to be in electrical communication with a gate pad ona surface of the MOSFET die, and a second portion configured to be inelectrical and thermal communication with a source pad on the surface ofthe MOSFET die through physical contact with a solder ball contact; anda plastic package body encapsulating the MOSFET die, the solder ballcontact, and at least a part of the first and second metal layers,wherein the first metal layer comprises integral leads projecting fromthe plastic package body.
 3. The package of claim 2 wherein the firstmetal layer is configured to be in thermal and electrical communicationwith a drain on a second surface of the MOSFET die.
 4. The package ofclaim 2 comprising at least one additional lead integral with the secondmetal layer.
 5. A package for a semiconductor device, the packagecomprising: a first metal layer configured to be in at least thermalcommunication with a first side of a first power device die throughphysical contact with a first solder ball contact; a second power devicedie located above or below the first power device die and in electricalcontact with a second side of the first power device die throughphysical contact with a second solder ball contact; and a second metallayer disposed on an opposite side of the second power device die fromthe first power device die, the second metal layer configured to be inat least thermal communication with the second power device die, thefirst metal layer or the second metal layer comprising integral leadsprojecting from a plastic package body encapsulating the first powerdevice die, the first solder ball contact, the second solder ballcontact, and at least a part of the first and second metal layers,wherein the first power device die or the second power device die is inelectrical communication with the first metal layer or the second metallayer.
 6. A method of packaging a semiconductor device, the methodcomprising: providing a first metal layer, wherein: the first metallayer is configured to be in thermal and electrical communication with afirst surface of a first power device die wherein the first metal layeris provided with a portion bent out of a plane of the first metal layerto form a lead exposed by a package body; and the first metal layerincludes a first portion of the first metal layer is configured to be inat least thermal communication with a first surface of a second powerdevice die; providing a second metal layer, wherein: the second metallayer is configured to be in thermal and electrical communication with asecond surface of the first power device die opposite the first side,through physical contact with a first solder ball contact; and thesecond metal layer includes a second portion configured to be inelectrical and thermal communication with at least one pad on a secondsurface of the second power device die opposite the first surface,through at least one additional solder ball contact; and encapsulatingthe first power device die, the second power device die, the firstsolder ball contact, the at least one additional solder ball contact andat least a part of the first and second metal layers within a plasticencapsulant to form the package body.
 7. The method of claim 6 whereinthe second portion is also in electrical communication with a pad on thesecond surface of the first power device die.
 8. The method of claim 6wherein the first power device die comprises a MOSFET die, and thesecond portion is in electrical communication with a gate of the MOSFETdie.
 9. The method of claim 6 further comprising providing a third powerdevice die disposed above or below the second power device die and inelectrical communication with the second power device die through asecond solder ball contact.